HIP datasheet, HIP pdf, HIP data sheet, datasheet, data sheet, pdf , Intersil, Driver, Full Bridge FET, No Charge Pump. HIP 80V/A Peak Current Full Bridge Fet Driver. The is a medium frequency, medium voltage H-Bridge N-Channel MOSFET driver IC, available in HIP Data Sheet. FN CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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All other trademarks mentioned are the property of their respective owners. Low Level Input Current. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result. External bootstrap diode and capacitor are required. Disable Turn-on Propagation Delay. Mold flash, protrusion and gate burrs shall not exceed.
Hop4082 negative supply, generally will be ground. B High-side Bootstrap supply. Supply Voltage, V DD.
When DIS is taken low the outputs are controlled by the other inputs. The HIP is a medium frequency, medium voltage. D, D1, and E1 dimensions do not include mold flash or protrusions. Disable Turn-off Propagation Delay. De-couple this pin to V SS Pin 6. If it is datashwet present, a visual.
A High-side Bootstrap supply. V DD Quiescent Current. HIP’s reduced drive current allows smaller packaging.
HIP Datasheet(PDF) – Intersil Corporation
Upper Turn-off Propagation Delay. Dimension “E” does not include interlead datasheft or protrusions. This is a stress only rating and operation of the. All voltages are relative V SS unless otherwise specified. Terminal numbers are shown for reference only. DIS – Lower Outputs. Times of Typically 15ns. High Level Output Voltage. Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device.
Intersil Corporation’s quality certifications can be viewed at www. Connect resistor from this pin to V SS to set timing current that defines the dead time between drivers. Low Level Input Voltage. DIS high overrides all other inputs. Hip402 level input that controls AHO driver Pin These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
DIS – Upper Outputs. Logic level input that when taken high sets all four outputs low. Upper Turn-on Propagation Delay. The lead width “B”, as measured 0. If AHI Pin 7 is driven high or not connected. Connect cathode of bootstrap.
HIP datasheet, Pinout ,application circuits 80 V/ A Peak Current Full Bridge FET Driver
If BHI Pin 2 is driven high or not connected. Connect negative side of. High Hip40082 Input Current. For information regarding Intersil Corporation and its products, see www. All drivers turn-off with no adjustable delay, so the DEL resistor guarantees no shoot-through by delaying hop4082 turn-on. V DD Operating Current. User-Programmable Dead Time 0.
Bootstrap Capacitor when Pulled Low. Information furnished by Intersil is believed to be accurate and. B High-side Source connection.
80 V/1.25 A Peak Current Full Bridge FET Driver
No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. DEC seating plane gauge GS – 3. Metric dimensions, the inch dimensions control.
In case of conflict between Dahasheet and.
Logic level input that controls BHO driver Pin Copyright Intersil Americas Inc.